CAES Wins Contracts for Development of Next-Generation, Octa-Core, User-Selectable CPU for Space



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PARIS–(BUSINESS WIRE)–CAES, a leader in advanced mission-critical aerospace and defense electronics, announced that it has won multiple contracts with the European Space Agency (ESA) for the development of the GR765 system-on-chip (SOC), the first user-selectable CPU for space. This next-generation radiation-protected device allows users to choose between LEON5 SPARC V8 or NOEL-V RISC-V RV64 processor cores.

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CAES announced that it has been awarded multiple contracts with the European Space Agency (ESA) to develop the GR765 System-on-Chip (SOC), the first user-selectable CPU for space.  (Photo: Business Wire)

CAES announced that it has been awarded multiple contracts with the European Space Agency (ESA) to develop the GR765 System-on-Chip (SOC), the first user-selectable CPU for space. (Photo: Business Wire)

CAES previously received funding from the Swedish National Space Agency (SNSA) under ESA’s General Support Technology Program (GSTP) for the preliminary development of system requirements for GR765. In parallel, a demo chip was fabricated with LEON5 and NOEL-V fault-tolerant cores on STMicroelectronics’ 28nm FDSOI technology. The new incremental Advanced Research in Telecommunications Systems (ARTES) and Technology Development Element (TDE) program agreements will allow CAES to advance the development and manufacture of the GR765 prototype on this technology.

The official contract signing took place on September 22, 2022 at the International Astronautical Congress (IAC) in the Swedish Pavilion in Paris, France. Present were Elodie Viau, Director of Telecommunications and Integrated Applications at ESA, and Sandi Habinc, General Manager of CAES Gaisler Product.

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“ESA is proud to be collaborating with CAES on the development of this next-generation computing technology, which is critical to building intelligent, high-performance and safe systems in space. Our collaboration will improve Europe’s capacity to launch and execute its ambitious future missions and put us at the forefront of advancing the global technological standard for computing in space,” said Elodie Viau, Director of Telecommunications and Integrated Applications at ESA.

“The CAES GR765 meets the ever-increasing demands of payload data processing in telecoms, but also benefits a wide range of other mission-critical applications, such as:

“CAES is pleased to announce the first user-selectable CPU for space. We offer our customers options to select the best architecture based on their requirements while meeting the space industry’s future demands for more computing power and a seamless ecosystem, as well as considering size, weight and power (SWaP),” said Mike Elias, Senior Vice President and General Manager, Space Systems Division, CAES.

CAES will work closely with STMicroelectronics, a leading European semiconductor company, on product manufacturing and qualification for the GR765. “We are proud to be collaborating with CAES on their next-generation microprocessors for space. The combination of proven SPARC and RISC-V technology with the technological capability and maturity of 28nm FDSOI for space is a perfect match,” said Francois Martin, Head of Space & Defense ASICs Business Development, Microcontroller & Digital Group, STMicroelectronics. “In addition to silicon fabrication, ST offers the manufacturing and qualification of HiRel products through its proven supply chain at its factories in Crolles and Rennes, France.”

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The GR765 system-on-chip will offer greater flexibility and functionality while delivering the higher processing and bandwidth needed for future space applications. It will also allow the user to reuse legacy LEON SPARC software or develop new software for the NOEL-V RISC-V architecture, providing the opportunity to leverage cutting-edge software developed in other industries.

Based on the radiation test on the demo chip, CAES estimates the SEU tolerance for the GR765 product to be at least five times tougher than current radiation-hardened processors. CAES will implement its legacy approach to fault tolerance, allowing software to transparently continue execution on correctable errors and extending fault tolerance to peripherals and software libraries.

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About CAES

CAES is a pioneer of advanced electronics for the most technologically demanding military and aerospace systems. As the United States’ largest provider of mixed-signal and radiation-hardened technology to the aerospace and defense industries, CAES delivers highly reliable RF, microwave and millimeter wave, microelectronic and digital solutions that enable our customers to have a safer and more secure… operation to ensure Planet. On land, at sea, in the air, in space and in cyberspace, CAES’ extensive electronics and advanced manufacturing capabilities are at the forefront of mission-critical military and aerospace innovations. www.caes.com

About ESA’s ARTES Core Competitiveness Programme

ESA’s ARTES (Advanced Research in Telecommunications Systems) program is unique in Europe and aims to support the competitiveness of European and Canadian industry in the world market. Core Competitiveness is dedicated to the development, qualification and demonstration of products (“Competitiveness and Growth”) or long-term technology development (“Advanced Technology”). Products in this context can be equipment for a satellite platform or payload, a user terminal or a complete telecommunications system that integrates a network with its space segment.

Learn more at: https://artes.esa.int/core-competitiveness

Press:

Alain Monismith

CAES

[email protected]

Source: CAES





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